Giryun Hong (Ph.D. candidate) from the Department of Electrical Engineering at POSTECH (Advisor: Baek, Rock-Hyun) received the IEEE Outstanding Paper Award for his presentation at the 2025 Academic Symposium of the Institute of Electronics and Information Engineers (IEIE).

The symposium, organized by the Daejeon–Chungnam Chapter of IEIE, is a representative academic event that brings together researchers to share the latest advances in semiconductor and electronic engineering, while recognizing outstanding research contributions.

Hong presented his work titled “Optimized Ru Word-Line Architecture with Low Resistivity and Low Work-Function Variation for PLC 3D NAND.” In this research, he proposed a barrierless ruthenium (Ru) word-line architecture to overcome the scaling and reliability limitations of conventional word-line structures.

This achievement is significant in that it introduces a new design direction capable of simultaneously improving reliability and performance in highly integrated 3D NAND memory technologies. The proposed approach is expected to contribute to the future development of next-generation NAND flash memory processes and materials.