▣ Title : “System-level” signal integrity analysis of high-speed links

▣ Speaker : Dong Gun Kam (Ajou University)

▣ Date & Time : Friday, December 13 (4:00 ~ 5:30pm)    

▣ Place : LG Research Building, Room #101

▣ Host : Prof. ByungSub Kim (T. 2382)

▣ Abstract :

 In only the last several years, industry standard serial data rates have rocketed past 10 Gb/s and are quickly approaching 25 Gb/s and higher for backplane and chip-to-chip interconnects. Such high data rates present huge challenges in the design of both passive channel elements such as IC packages, sockets, board material and connectors, and active SERDES devices on system ICs.

This seminar will discuss a range of topics important in the design and analysis of high-speed links from a holistic standpoint, considering I/O circuits and architectures, and including all levels of electrical packaging.